Mukta Sharma
Gilbert
Summary
Experienced Process Integration with a strong background in the semiconductor industry. Proven track record of optimizing manufacturing processes to enhance yield, reduce costs, and improve product quality. Demonstrates project management skills, innovative thinking, and a scientific approach to solving new challenges. Excellent communication, leadership, and interpersonal skills, with experience in diverse environments and customer interactions. Experienced with JMP, and other statistical tools. Adept at troubleshooting using structured problem-solving, design of experiments, and SPC analysis.
Overview
22
22
years of professional experience
Work History
Process Integration and Yield Engineer
Intel
01.2022 - Current
- Aligned process adjustments with yield enhancement goals, leading to 25% defect improvements.
- Recognized at the factory level for supporting yield improvement projects that resulted in a 20% increase in run rate.
- Contributed to cost-avoidance projects by reducing necessary tools for POR.
- Led real-time task forces to promptly address and resolve production excursions.
- Collaborated with Virtual Factory and Technology Development teams to validate and implement process enhancements.
- Generated detailed, timely reports summarizing product yield health.
- Spearheaded continuous improvement initiatives focused on yield, defect, cost, and productivity enhancements.
- Developed strong partnerships across diverse engineering groups.
- Defect Reduction Lead for Integrated Module Team, defining roadmaps and procedures.
- Led working groups with modules to brainstorm projects aimed at reducing EDI and cutting costs.
- Extracted actionable insights from data to drive process improvements.
- Conducted root cause analysis and MBPS to enhance yield performance.
Sr. Engineer Technology
Photronics
06.2021 - 07.2021
- Extensive knowledge and hands-on experience in mask Fab operations, including inspection, with a focus on optimization and solution implementation.
- Expertise in defect yield analysis, driving down to root cause analysis, and utilizing specialized tools.
- Skilled in defect characterization and solutions, understanding the impact of systematic and process-related defects versus fab defectivity.
- Experienced in handling complex issues, requiring in-depth evaluation of variable factors and data.
- Demonstrated sound judgment in selecting methods, techniques, and evaluation criteria to achieve results.
- Successfully networked and coordinated information exchange with internal and external contacts.
- Executed tasks in a complex, high-performance mask tape-out environment, enhancing cycle time, managing costs, and striving for continuous improvement in process capability.
Sr. Process Engineer
GLOBALFOUNDRIES
05.2013 - 07.2018
- Served as Layer Owner for BEOL layers in Contamination Free Manufacturing (CFM) for advanced technologies, including 28nm, 22FDSOI, 14nm, and 7nm nodes.
- Improved via open yield by approximately 25% through DOE setup with CMP and defect reduction techniques.
- Analyzed in-line defect data using inspection and SEM review tools.
- Reduced work content by using AutoHotkey for SPC charts. Chart update rate improved to 3 charts/min (368 charts in less than 2 hours) from 5 charts/30 mins.
- Led a project for hold reduction in ATD CFM, achieving over a 60% reduction in holds and meeting targets.
- Expertise in Process Windows Qualification for multiple technologies (PWQ) and Process Window Centering (PWC). Developed recipes for PWQs, analyzed process windows, and published reports to Integration and Photolithography teams.
- Performed daily disposition of Out of Control (OOC) lots with quick Turn-around-time.
- Utilized various Root Cause Analysis methods such as DSA scan, DOE split scan, tool commonality, and correlations to identify abnormal processes or tools and initiate corrective actions.
- Conducted defect source analysis based on defect images and wafer-map signatures.
- Developed a thorough understanding of semiconductor manufacturing processes and tools to link defects back to specific processes and tools.
- Collaborated with different process modules, Process Integration (PI), and Technology Development (TD) groups for inline defect support.
- Worked efficiently as part of a team, adhering to well-defined timelines, and demonstrated flexibility and resourcefulness to achieve optimal results.
- Provided clear reporting and communication of issues to home Fab teams on a daily basis.
- Demonstrated flexibility in job assignments and readiness to work weekend shifts on a rotational basis as per business needs.
Research Assistant
Utah State University
06.2005 - 05.2013
- Analytical and numerical methods to enhance plasma theory
- Extensive use of programming/scripting languages
- Advanced plasma kinetic theory and related computational algorithms and associated data analysis tools
- Closed the fluid equations and advanced plasma kinetic equations with analytical and numerical methods
- Derivation of parallel heat transport in magnetized plasma
Teaching Assistant
Utah State University
01.2010 - 01.2011
- Taught undergraduate labs for students in engineering and premed
- Defined interpersonal and problem-solving skills by holding weekly homework help sessions
- Assisted in Physics of Great Scientists course.
Researcher
University of Delhi and National Physical Laboratory
06.2002 - 08.2004
- Synthesis, analysis, and characterization of bulk, thin film YBCO/BSCCO
Education
Ph.D. - Physics
Utah State University
Logan, UT05.2013
Master of Science - Physics
Delhi University
New Delhi, DL06.2002
Bachelor of Science - Physics
Delhi University
New Delhi, DL06.2000
Skills
- Project Management
- Resilience
- Organizational skills
- Adept communication
- JMP
- SPC
- DOE
- Reasoning and decision-making
- Process integration
- Work content reduction
- Root cause analysis
- Structural problem solving
Timeline
Process Integration and Yield Engineer
Intel
01.2022 - Current
Sr. Engineer Technology
Photronics
06.2021 - 07.2021
Sr. Process Engineer
GLOBALFOUNDRIES
05.2013 - 07.2018
Teaching Assistant
Utah State University
01.2010 - 01.2011
Research Assistant
Utah State University
06.2005 - 05.2013
Researcher
University of Delhi and National Physical Laboratory
06.2002 - 08.2004
Ph.D. - Physics
Utah State University
Master of Science - Physics
Delhi University
Bachelor of Science - Physics
Delhi University
Similar Profiles
Amani ElmagdubAmani Elmagdub
Manufacturing Technician at IntelManufacturing Technician at Intel
Gustavo GarciaGustavo Garcia
Pipefitter Leadman at IntelPipefitter Leadman at Intel
Leonard OkekeLeonard Okeke
Module Technician at IntelModule Technician at Intel